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  Computer architectures
  • DEC computing timeline

  • DEC 18-Bit:
    PDP-1 (1960, $120,000, PDP-1 story, info)
    PDP-4 (1962, $60,000, low-cost version of PDP-1)
    PDP-7 (1964, $72,000, often used for real-time control, DECsys OS for DECtape)
    PDP-7A (1965, second version of PDP-7, R series Flip-Chip modules)
    PDP-9 (1966, $35,000, PDP-7 upgrade, 2x speed of PDP-7)
    PDP-15 (1969, $16,500, PDP-9 TTL IC upgrade)

    programs/operating systems:
    DECsys (for DECtape)
    MUMPS-15 (1970, developed as a general purpose data management
    language at Massachusetts General Hospital)
    TECO ("Tape Editor and Corrector", first version for PDP-1, history, PC versions downloads)

  • DEC 36-Bit (PDP-10):
    main-frame computer, 36-Bit data words, machines w/o MMU (virtual memory) have 18-Bit addresses, machines with MMU: virtual addresses are 18-Bits (lower part) wide plus variable number of section Bits (upper part) depending on processor model

    36-Bit DEC history,
    PDP-10 models,
    PDP-10 CPUs,
    software archive (TOPS-10, TOPS-20, ...),
    www.36bit.org: docs, downloads, manuals, schematics,
    J. Smith's PDP-10 page (www.inwap.com), hbaker's infos, machine language,
    Phil's PDP10 Miscellany Page (hardware, software, ...),
    KI10 info,
    pdp10.nocrew.org (software, docs, emulators), PDP-10 opcodes,
    PDP-6 info,
    PDP-10 machine language,
    PDP-10 machine language2 (sunsite.unc.edu),


    PDP-6 (1964, $300,000, Type 166 processor, using DEC System Modules, most built for MIT, timesharing system, for scientific use, lacked some PDP-10 features: differences)

    PDP-10 (1967, $110,000, timesharing + batch + real-time system, 2x speed of PDP-6, KA10 processor)

    DECsystem-10/50, 40 (1971, KA10 processor)
    DECsystem-10/55 (dual-processor (Master/Slave) 50 model)

    DECsystem-10/70, 60 (1972, KI10 processor)
    DECsystem-10/77 (dual-processor (Master/Slave) 70 model)

    DECsystem-10/80 (1974, KL10-A processor, since then PDP-11/40 as front-end I/O processor running RSX-20F, 1.5 VAX MIPS, picture)
    DECsystem-10/88 (dual-processor (Master/Slave) 80 model)

    DECsystem-10/90 Model-A (1974, KL10-B processor)

    DECsystem-20/50, 40 Model-A (1976, 256K 36-Bit core memory, KL10-C processor, 40: w/o cache, first machine for TOPS-20)

    DECsystem-10/90T (1977, KL10-BC processor, for ARPAnet)
    DECsystem-10/99 (SMP (2,3,4) 50 model)

    DECsystem-10/90 Model-B (1978, KL10-D processor)

    DECsystem-2020 (1978, low-cost, KS10 processor, 8080 based front-end I/O processor)

    DECsystem-20/60, 50 Model-B (1981, KL10-E processor)

    TD-1 ("TOAD-1", XKL-1 processor, clone, by XKL, manual, info, 1994)

    processors: (CPU list, models, info, XKL-1 manual (contains PDP-10 architecture description))

    Type 166 (hardwired (no microcode), processor for PDP-6, 1964, arithmetic processor manual)

    KA10 (hardwired (no microcode), 18-Bit address, 1967)

    KI10 (hardwired (no microcode), MMU with paging, 18/22-Bit virtual/physical address, TTL ICs, 1972, 2x speed of KA10)

    KL10 (processor family, microcoded, MMU with paging, 18/22-Bit virtual/physical address, (extended addressing: 23/22-Bit virtual/physical address, 32 sections (5 section Bits)), ECL ICs, 1974, paging, XKL-1 manual (contains KL10 description))
    KL10-PA (KL10 core processor, for KL10-A, B, C, BC)
    KL10-PV (KL10 core processor, MCA20 cache, for KL10-D, E)
    KL10-PW (KL10 core processor, MCA25 cache, for KL10-E+)
    MCA20 (pager/cache memory, 2048W size)
    MCA25 (pager/cache memory, 4096W size, support for SMP)
    KL10-A (1974, 2x speed of KI10)
    KL10-B (1974)
    KL10-C ("KL20", 1976)
    KL10-BC (1977)
    KL10-D (1978)
    KL10-E (1981)
    KL10-E+ (1984)

    KS10 (no cache, 18/20-Bit virtual/physical address, 1978, AMD 2900 Bit slice TTL, for low cost model DECsystem-2020, XKL-1 manual (contains KS10 description), ftp)

    KC10 ("Jupiter", never built, to be used in DECsystem-20/80)

    XKL-1 (based on KL10, 30/33-Bit virtual/physical address, 4096 sections (12 section Bits), by XKL, for TD-1, manual)

    programs/operating systems:
    TOPS-10 (formerly "Monitor", sometimes called "BOTS-10")
    TENEX (by Bolt, Beranek & Newman (BBN), requires custom-built paging unit for KA10 processor (picture), virtual memory support, info, paper on SMP)
    TOPS-20 ("TWENEX", based on BBN's TENEX, 1968, for DECsystem-20 models, requires KL10 processor, intro, history)
    ITS ("Incompatible Timesharing System", by AI Lab at MIT, 1971, MIDAS assembler, code + docs, info + PCLSR, paging, download)
    WAITS ("West-coast Alternative to ITS")
    kcc source
    TECO-10 (first TECO version was for PDP-1, history, source)
    EMACS ("Editing Macros", originally set of macros for MIT TECO-10, history)

  • DEC 12-Bit (PDP-8):

    PDP-8 models, FAQ, FAQ2 , PDP-5 info, pdp-8.org, Highgate's PDP-8 Page

    PDP-5 (1963, $27,000, not 100% compatible with PDP-8)
    PDP-8 (1.5 microsec cycle, 4K 12-Bit memory, 1965, $18,500, smallest and least expensive PDP)
    PDP-8/S (1966, $10,000, low cost and low speed version)
    LINC-8 ("Laboratory Instrument Computer", 1966, $38,500, based on a Lincoln Lab design for biomedical applications)
    WPS-8 (1967, word processing system)
    PDP-8/I (1968, $12,800, TTL ICs)
    PDP-8/L ($8,500, scaled down OEM version of PDP-8/I)
    TYPESET-8 (1968, PDP-8 hardware + software for typesetting)
    PDP-12 (1969, $27,900, LINC-8 successor, "LINC-8/I", mainly for data acquistition and display)
    PDP-14 (1969, ROM based controller)
    PDP-8/E (1970, $7,390, PDP-8/I successor, +3Bit address extension, OMNIBUS)
    LAB-8E (1971, laboratory computer, based on PDP-8/E)
    PDP-8/F (1972, TTL MSI, based on PDP-8/E)
    PDP-8/M (1972, OEM version of PDP-8/F)
    PDP-8/A (1975, TTL LSI)
    VT78 ("DECstation 78", 1978, IM6100 microprocessor)
    DECmate I ("VT278", 1980, HM6120 microprocessor, home computer, picture)
    DECmate II
    DECmate III (1984)
    DECmate III+ (1985)

    PDP-8 chips see here

    OMNIBUS (12-Bit data/12-Bit address parallel, synchronous)

    operating systems:
    TTS/8 (Carnegie-Mellon University, 1968),
    CAPS-8 (cassette based),
    OS/78 (OS/8 for VT78),
    OS/278 (OS/8 for DECmate),

  • DEC 8/16-Bit controller (RTM):
    RTM ("PDP-16", "Register Transfer Module", 1971)
    PDP-16/M (1972)

  • DEC 16-Bit (PDP-11):


    www.telnet.hu/hamster/pdp-11, family tree, modules, table, models, models2, manuals, performance, fieldguide, www.pdp11.org, yet another PDP-11 page
    important platform in UNIX history (see copyright) and ancestor of DEC VAX family

    models: (model table)

    PDP-11/20, 15 (1970, 15 is OEM version, the only PDP-11 that is hardwired (non-microcoded), KA11 CPU, optional EAE, UNIBUS, 28K, info, hardware + circuit diagrams)

    PDP-11/45 (1971, SSI/MSI Schottky TTL, optional 18-Bit MMU, separate I/D, dual resister set, base+, KB11-A CPU, EIS (KE11-E), optional FPP (FP11), optional fastbus memory, UNIBUS, 248K, info)

    PDP-11/40, 35
    (1972, low cost version of PDP-11/45 architecture, 2x speed of PDP-11/20, 18-Bit MMU, base+, KD11-A CPU, optional EIS (KE11-E), optional FIS (KE11-F), optional FPP (FP11), 35 is OEM version, UNIBUS, later used as front-end I/O processor in DECsystem-10/80)

    PDP-11/10, 05 (1972, 05 is OEM version, low cost successor of PDP-11/20, KD11-B CPU, UNIBUS, info)

    LSI-11 board
    (1975, LSI-11 microprocessor, base+, optional EIS, optional FIS, end-user microcomputer, KD11-F board, LSI-11-Bus, info)
    PDP-11/03 (1975, LSI-11 microprocessor, base+, optional EIS, optional FIS, KD11-F board, LSI-11-Bus, 1/3x speed of PDP-11/20, info, later used as front-end processor in VAX-11/780)
    MINC-11 ("modular instrument computer", laboratory computer, based on PDP-11/03)
    VT103 (VT100 terminal with built-in LSI-11 computer, info)

    (1975, PDP-11/45 successor, 22-Bit MMU, separate I/D, 4MB MASSBUS memory, 2KB cache memory, dual register set, KB11-B and KB11-C CPU, EIS (KE11-E), FPP (FP11), MASSBUS + UNIBUS, performance only comparable to PDP-11/45, UNIBUS implementation had poor performance, high end, info, "ancestor" of VAX-11/780)

    (1975, successor of PDP-11/05, 18-Bit MMU, optional cache, base+, KD11-E CPU, EIS (KE11-E), optional FPP (FP11), UNIBUS, info)

    PDP-11/50 (1976, PDP-11/45 with MOS memory on fastbus, KB11-A)
    PDP-11/55 (1976, PDP-11/45 with high speed memory and PDP-11/70 processor but w/o cache and with only 18-Bit addressing, high end, KB11-D CPU)

    LSI-11/2 board (1976, LSI-11 microprocessor with 18-Bit MMU, KD11-H board, Q-Bus, info)

    (1977, PDP-11/40 successor, 18-Bit MMU, writable control store (WCS), base+, KD11-K CPU, EIS (KE11-E), floating point optional via microcode or extra FPP module (FP11), UNIBUS, info)

    PDP-11/04 (1978, low cost version of PDP-11/34, base+, no MMU, no floating point, KD11-D CPU, info)
    PDP-11/34a (1978, improved PDP-11/34 with floating point coprocessor, KD11-EA CPU, info)
    PDP-11/34c (1978, PDP-11/34a with cache but lower clock rate, info)

    (1979, PDP-11/03 successor, F11 microprocessor with 22-Bit MMU, base+, EIS, optional FPP, optional CIS (only if no FPP installed), 4 chip sockets (F11, MMU, FPP) or (F11, MMU, CIS1, CIS2) on KDF11-A board, optional floating point FPF11 board, Q-Bus, info)
    MINC-23 ("modular instrument computer", laboratory computer, based on PDP-11/23)

    (1979, middle-class PDP-11/70 and PDP-11/55 successor, LSI Bitslice CPU with 22-Bit MMU, separate I/D, lack of dual register set, cache, base+, KD11-Z CPU, EIS (KE11-E), optional FPP (FP11), optional CIS, 1MB)

    PDT-11/100 series ("Programmable Data Terminal", 1980, F11 microprocessor, 110 and 130 built into a VT100 terminal, 150 had separate VT100 terminal)

    (1981, PDP-11/34a successor, F11 microprocessor with 22-Bit MMU, base+, EIS, optinal FPP, optinal CIS, UNIBUS version of PDP-11/23 with 5 chip sockets (F11, MMU, FPP, CIS1, CIS2) on KDF11-U board, optional floating point FPF11 board, 1MB, UNIBUS, info)

    PDP-11/23+ (1981, PDP-11/23 successor, KDF11-B board, Q22-Bus)
    MicroPDP-11/23 (PDP-11/23+ in different packaging)

    PRO-325, 350
    (1982, personal computer, F11 processor, info, later used as "VAX Console" (running P/OS) for VAX 8500 series)

    SBC-11/21 ("Falcon" single-board computer, T11 microprocessor, KXT11-A board)
    SBC-11/21+ ("Falcon+" single-board computer, T11 microprocessor, KXT11-AB board)

    LSI-11/73 board (J11 processor at 15MHz with 22-Bit MMU, separate I/D, cache, dual register set, base+, EIS, FPP with FPJ11-AA chip, KDJ11-A board, Q22-Bus, e.g. upgrade for PDP11/23+)
    MicroPDP-11/73 (1984, J11 processor at 15 MHz with 22-Bit MMU, separate I/D, cache, dual register set, base+, EIS, FPP, PDP-11/70 and PDP-11/23+ successor, KDJ11-B board, Q22-Bus)

    PRO-380 (1986, J11 microprocessor upgrade to PRO-350, info)

    (1985, J11 processor at 18 MHz with 22-Bit MMU, MicroPDP-11/73 successor, KDJ11-BF board, Q22-Bus, info)
    PDP-11/84 (1985, same processor module as in MicroPDP11/83, PDP-11/44 and PDP-11/24 successor/replacement, KDJ11-BF board, PMI + UNIBUS with KTJ11-B bridge, picture)

    MicroPDP-11/53 (1987, cut down version of MicroPDP-11/73, w/o cache support, KDJ11-D board)

    MicroPDP-11/93, PDP-11/94
    (1990, improved MicroPDP-11/83 and PDP-11/84, no cache, KDJ11-E board, info)

    instruction sets: (model table)

    * base (models PDP-11/20, 15, 05, 10)
    * "base+" (base + (MARK, RTT, SOB, SXT))
    * EAE (integer multiply/divide extension, as separate module (in contrast to EIS), for PDP-11/20 and PDP-11/40)
    * EIS ("Extended Instruction Set", integer multiply/divide/multiple shift extension (MUL, DIV, ASH, ASHC), first in PDP-11/45, further extended for PDP-11/40 (SOB, XOR, MARK, SXT, RTT))
    * FIS ("Floating point Instruction Set", 32-Bit (single precision) floating point extension (0x7a00-0x7bff: FADD, FSUB, FMUL, FDIV), first for PDP-11/40)
    * FPP or FP-11 ("Floating Point Processor", 32/64-Bit (single/double precision) floating point extension (0xf000-0xffff: LDF, STF, LDCFF, STCFF, CMPF, LDEXP, STEXP, LDCIF, STCIF, MULF, MODF, ADDF, SUBF, DIVF), as separate module (in contrast to FIS), first for PDP-11/45 )
    * CIS ("Commercial Instruction Set", ASCII and decimal string operations (0x7d00-0d7eff), for COBOL/DIBOL applications)

    (partially taken from postings on minnie.tuhs.org)
    PDP-11 chips see here

    KA11 (PDP-11/15, PDP-11/20)

    KB11-A (PDP-11/45, PDP-11/50)
    KB11-B (PDP-11/70)
    KB11-C (PDP-11/70)
    KB11-D (PDP-11/55)

    KD11-A (PDP-11/35, PDP-11/40)
    KD11-B (PDP-11/05, PDP-11/10)
    KD11-D (PDP-11/04)
    KD11-E (PDP-11/34)
    KD11-EA (PDP-11/34a)
    KD11-K (PDP-11/60)
    KD11-Z (PDP-11/44)

    KD11-F (LSI-11 chip, LSI-11, PDP-11/03)
    KD11-H (LSI-11 chip, LSI-11/2)

    KDF11-A (F11 chip, PDP-11/23)
    KDF11-B (F11 chip, PDP-11/23+)
    KDF11-U (F11 chip, PDP-11/24)

    KDJ11-A (J11 chip, LSI-11/73)
    KDJ11-B (J11 chip, MicroPDP-11/73)
    KDJ11-BF (J11 chip, MicroPDP-11/83, PDP-11/84)
    KDJ11-D (J11 chip, MicroPDP-11/53)
    KDJ11-E (J11 chip, MicroPDP-11/93, PDP-11/94)
    KXJ11-CA (J11 chip, peripheral processor)

    KXT11-A (T11 chip, SBC-11/21)
    KXT11-AB (T11 chip, SBC-11/21+)
    KXT11-CA (T11 chip)

    options for KB11 and KD11 processors:
    FP11-... (FPP coprocessor)
    KE11-... (coprocessors for CIS, EIS, FIS)
    KT11-... (MMU)


    * UNIBUS (16-Bit data/18-Bit address parallel, asynchronous)
    * fastbus
    * MASSBUS (info)
    * LSI-11-bus
    (16-Bit data/16-Bit address time multiplexed, asynchronous)
    * Q-Bus (based on LSI-11-bus, 18-Bit address, successor of LSI-11-bus)
    * Q22-Bus (22-Bit address version of Q-Bus, often referred to as "Q-Bus")
    * PMI ("Private Memory Interconnect", enhanced Q22-Bus, used in PDP-11/84, KTJ11-B adapter to UNIBUS)

    controllers and interfaces: see VAX

    operating systems
    : (list)

    DOS/BATCH (DOS-11 file system),
    CAPS-11 (cassette based),
    RSTS-11 (based on TSS/8 for PDP-8),
    RSX-11D (command language interpreters: MCR, DCL, filesystem: ODS-15),
    RSX-11M (mid-sized RSX-11D),
    RSX-11M+ (added 22-Bit support),
    RSX-11S (standalone system),
    RSX-20F (modified RSX-11 for PDP-11/40 as front-end for PDP-10 KL processors),
    IAS ("Interactive Application System"),
    P/OS (menu based RSX-11M for PRO-300 series),
    MUMPS-11 ("Massachusetts General Hospital Multi-User Multi-Processing System", operating system + programming language + database-management system)
    VENIX (for PRO-300 series, by VentrurCom)
    Micropower Pascal ("MPP", Pascal compiler + kernel, similar to VAXELN for VAX)


    DECnet (see VAX)

  • DEC 32-Bit (VAX or VAX-11, "virtual address extension")

    vaxarchive (hardware), Planet VAX, NetBSD/vax, netboot, performance (Compaq), models+performance, timeline
    super-minicomputer, 32-Bit virtual addresses (fixed 512Byte page size), 32-Bit data (plus various data types of different sizes),
    first model: VAX-11/780 ("virtual address extension" to PDP-11/70, 1977),
    important platform in UNIX history (see copyright) and for modern 32-Bit virtual memory and CPU architecture concepts

    models: (not chronological, models, models, models, models, models)

    VAX 700 (first VAX: VAX-11/780)
    VAX 8000
    VAX 9000

    data-center systems/servers:
    VAX 6000
    VAX 7000
    VAX 10000

    MicroVAX (e.g. MicroVAX II/GPX)
    VAXstation (e.g. VAXstation 4000/90)
    VAX 4000

    fault tolerant systems:

    VAX chips see here


    "DNA": "Digital Network Architecture", hardware and software specification for the "DECnet" network architecture

    "DECnet": network protocol stack in DNA (info)
    MAC/data link layer:
    * Ethernet: DECnet Phase IV (type = 0x6003), DECnet Phase V ("DECnet/OSI")
    * 802.x + 802.2 LLC
    * point-to-point/multipoint: DDCMP ("Digital Data Communications Message Protocol", parallel + serial synchronous + serial asynchronous)
    * ...
    network/routing layer:
    * DECnet Phase IV: DRP ("DECnet Routing Protocol", network address encoded within MAC address)
    * DECnet/OSI: DRP, OSI routing
    transport layer:
    * DECnet Phase IV: NSP ("Network Services Protocol")
    session layer:
    SCP ("Session Control Protocol", logical link management, name-to-address translation)
    application layer:
    DAP ("Data Access Protocol", remote file access), CTERM/RTERM (remote terminal), MAIL (email transport)

    "DECnet LAVC/SCA": "Local Area VAX Cluster", Ethernet protocol (type = 0x6007) for using a LAN as node interconnection within the SCA (see below), uses same naming and data link layer addressing scheme as DECnet

    "MOP": "Maintenance Operation Protocol", Ethernet protocol,
    * MOPDL ("dump/load assistance", type = 0x6001): file download/upload
    * MOPRC ("remote console", type = 0x6002): maintenance/diagnostics

    "LAT": "Local Area Transport", Ethernet protocol (type = 0x6004), remote terminal multiplexer

    "LAST": "Local Area System Transport", Ethernet protocol (type = 0x8041)

    "TCP/IP": Internet protocol stack
    VMS Implementations:
    DEC: UCX
    Wollongong: TCPIP
    Carnegie-Mellon University: CMUIP
    Process Software: TCPware
    TGV: Multinet

    Storage devices and clusters:

    "SCA": "System Communications Architecture", protocol family for storage device and intra-cluster communication (here, a mass storage controller is considered as a special computer "node"), contains the storage device communication protocol called MSCP
    overview and details: SCA, SCS, VMS architecture, MSCP SCA info

    "SCS": "System Communications Services", implementation of SCA for cluster communication and MSCP disk/tape import and export inside the VMS kernel, SCS is the layer above the port drivers and below MSCP disk (and TMSCP tape) class drivers, VAX-cluster connection manager uses SCS as well, SCSI does not use SCS (SCSI port and class drivers are directly connected, i.e., have nothing to do with SCA and SCS, DSA is the common interface of SCSI and MSCP drives), MSCP disk (and TMSCP tape) servers use SCS to export local DSA drives (see below) as MSCP/TMSCP drives (and therefore translate even local SCSI drives to MSCP),
    a software interface to SCS is called SYSAP ("SYStem APplication"),
    each class driver instance connected to SCS for offering a MSCP/TMSCP device to the DSA layer is called "VMS$DISK_CL_DRVR/VMS$TAPE_CL_DRVR process",
    each MSCP/TMSCP server instance connected to SCS for exporting a local DSA device is called "MSCP$DISK/MSCP$TAPE process"

    "DSA": "Digital Storage Architecture", programming interface specification, provided by class drivers to upper layers (I/O services and file system) in VMS, MSCP disk (and TMSCP tape) servers export local DSA drives via SCS to remote nodes, term "DSA" also used for MSCP-based generation of intelligent storage devices and controllers (e.g. SDI)

    "node": computer (or mass storage controller) attached to intercommunication bus

    "port": physical connection device to interconnection bus between nodes, "node1 <-> port device1 <-> SCA interconnection bus <-> port device2 <-> node2", see SSP for port device types,
    "node2" can also be "controller" or "controller <-> storage device" (e.g. see DSSI RF drives or HSC),
    sometimes "interconnection bus <-> port device2" missing in combined "port device1 + controller" (e.g. see local SSPs),
    sometimes "port" implemented as software layer for transport embedded within other inter-node communication (e.g. see DECnet LAVC/SCA via Ethernet data link layer)

    "GVP" ("Generic VAX Port"): standard for general peripheral devices which are connected to a VAX mainbus as a nexus (for performance reasons), MMU definitions etc.
    "BVP" ("BI VAX Port"): special GVP variant for VAXBI Bus, with special register definitions

    SCA port devices (see port drivers and SCA interconnect busses):
    cluster ports (more than 1 node):
    * CI (uses GVP)
    * SHAC (DSSI with SHAC chip, uses GVP)
    * MSI (DSSI with SII chip)
    * NI (via LAN)
    * SMCI (newer AXP systems, see below)
    local ports
    (host port device and controller directly combined, also called
    "SSP" ("Storage System Port"), info):
    * BVP SSP (integrated BVP-standard port device + device controller, see BVP, e.g.: HSB, TBK70)
    * UQSSP (integrated port device + drive controller on UNIBUS or Q-Bus, Note: small UQSSP/MSCP and UQSSP/TMSCP standalone driver implementations (without full SCA and SCS) possible, e.g.: RQDX3, KDA50, UDA50, TQK50)
    * "UQSSP on XMI" (e.g.: KDM70)
    * "UQSSP on VAXBI" (e.g.: KDB50)
    * "UQSSP with integrated VAXBI-UNIBUS adapter" (e.g.: KLESI-B)

    "PD" ("port driver"): basic driver for SCA support of the port device or even the (hardware) device driver for the port device, connected to the upper lying SCS layer (except for SCSI: port and class drivers are directly connected, have nothing to do with SCA and SCS, see "class driver"), PD is determined by port device type
    * PADRIVER: for CI and SHAC (GVP)
    * PIDRIVER: for MSI?
    * PEDRIVER: for NI ("Port Emulator", via LAN), special: only one device instance ("PEA1:") in system which connects to all LAN drivers with load balancing among all LAN devices
    * PUDRIVER: for UQSSP (Note: TMSCP port device name is "PT*:" and not "PU*:", e.g. TQK50)
    * ??DRIVER: for BVP SSP
    * PMDRIVER: for Memory Channel (on newer AXP systems)
    * PBDRIVER: for ? (Note: SYS$PBDRIVER for SMCI on newer AXP systems)
    * PWDRIVER: for ?
    * PK*DRIVER: for SCSI (called "port driver" but not part of SCA, directly connected to DSA SCSI class drivers, see "class driver")
    * PDDRIVER: "Pseudo-Disk" (RAM-disk) driver, not a PD for SCA!

    "PPD" ("port-to-port driver"): driver for connections between ports, implementation of the interconnection bus specific protocol, intergrated in PD for local port devices, CI and DSSI (MSI, SHAC) share same PPD

    "class driver": MSCP disk (or TMSCP tape) specific driver "DUDRIVER" ("TUDRIVER") on top of SCS offering DSA interface to upper layers (I/O services and file system),
    case of a generic SCSI disk or tape:
    SCSI class drivers ("DK*DRIVER", "MK*DRIVER") do not use SCS and are directly connected to SCSI port drivers ("PK*DRIVER") and offer DSA to upper layers, DSA is the common interface of SCSI and MSCP drives, MSCP server translates DSA SCSI drives into MSCP and exports them as MSCP drives (Note: in this case, the remote host uses the MSCP class driver for them but gives them the SCSI device name, e.g.: SCSI disk DKA100: on SERVER appears as "SERVER::DKA100:" on a client with "DUDRIVER" as client class driver).
    Note however that some MSCP controllers might offer SCSI controller-to-drive interfaces, translating MSCP from/to SCSI transparently (see below). Such controllers obviously provide MSCP-type devices to SCS. The same holds true also for other third-party interfaces (like SMD or ESDI) .

    "MSCP", "TMSCP": "Mass Storage Control Protocol"/"Tape Mass Storage Control Protocol", protocol between host class driver and drive controller or remote MSCP server (transported via special protocols on the interconnection bus), 32-Bit MSCP ID (identifier stored on disk or controller),
    interfaces (controller to drive) used by MSCP controllers:
    DEC: SDI, ST506 interface (RQDX), ...
    Emulex: SMD(-E), ST506 interface, ESDI, SCSI, ... (Note: Emulex MSCP controllers often emulate DEC UQSSP MSCP controllers)


    CPU/memory mainbusses and peripheral busses:
    "nexus": CPU module or peripheral controller or bus adapter connected to the CPU/memory mainbus, needs own full MMU
    "scatter/gather map": address translator hardware (register set) that maps addresses from one bus to another, esp. if the address lenghts of the involved busses are different

    * SBI ("Synchronous Backplane Interconnect", mainbus, used in VAX 780/8600, UNIBUS + MASSBUS + CI bus adapters)
    * CMI (mainbus, used in VAX 750)
    * NMI (mainbus, used in VAX 8800/8700/8500 series)
    * XMI ("eXtended Memory Interconnect", mainbus, 64-Bit, used in VAX 6000/7000/9000/10000 series, adapter to BI as peripheral bus)
    * PMI ("Private Memory Interconnect", mainbus, enhanced Q22-Bus, used in PDP-11/84, see PDP-11)
    * MASSBUS (mass-storage device peripheral bus, used in VAX 700/8000 and some PDP-11 series, info)
    * UNIBUS (16-Bit data/18-Bit address, address and data parallel, asynchronous, see PDP-11, peripheral bus (and mainbus in older PDP-11 systems), used in VAX 700/8000 series)
    * Q22-Bus ("Q-Bus", 16-Bit data/22-Bit address, address and data time multiplexed, asynchronous, see PDP-11, peripheral bus (and mainbus in MicroPDP-11 systems and MicroVAX I (KD32=KA610)), used in MicroVAX/VAXstation series)
    * BI ("VAXBI", "Backplane Interconnect", mainbus or peripheral bus to XMI, used in VAX 8200 as mainbus, used in VAX 8000/6000 series as peripheral bus)
    * M-Bus (mainbus for VAXstation 3520/3540 ("FireFox"), DFQWA-AA adapter to Q22-Bus)
    * TURBOchannel (used in VAX 4000 series, also in DECstation (MIPS) and DEC (Alpha) systems)
    * futurebus, futurebus+

    * CDAL, EDAL (mainbus in newer VAXstations)

    SCA interconnect busses:

    * CI ("Cluster Interconnect", transformer-coupled star topology with SC ("Star Coupler"), coaxial cable
    controller node (non-VAX) is called HSC ("Hierarchical Storage Controller"))

    * DSSI ("Digital Storage System Interconnect", 50-pin bus cable (SCSI-like but electrically not equivalent), same as CI aside from different physical layer (therefore same PPD), info,
    RFxx disks: info (combination of storage DSSI port device + disk controller + disk))
    controller node (non-VAX) is called HSD info (similar to HSC for CI), chips: SII, SHAC

    * NI ("Network Interconnect", virtual ports + interconnect bus via LAN (Ethernet or FDDI) data link layer with type=0x6007 "DECnet LAVC/SCA", special: only one device instance ("PEA1:") in system which connects to all LAN drivers with load balancing among all LAN devices)

    * SMCI ("Shared Memory Cluster Interconnect", on newer AXP systems for communication between OvenVMS AXP Galaxy instances)

    controllers and interfaces (controller to peripheral device):

    * SMD, SMD-E, SMD-O/E ("Storage Module Device", minicomputer interface standard by CDC, data rates: SMD=9.67MBit/s, SMD-E=24MBit/s, interface: 60-pin + 26-pin flat-band cables, e.g. Emulex QD32/QD33/QD34 (Q-Bus) and SC41/UD33 (UNIBUS) MSCP controllers, e.g. Emulex SC75 (CMI) MSCP controller??, e.g. Emulex SC31 (UNIBUS) non-MSCP (proprietary driver) controller, e.g. Fujitsu 2333A disk drive, info)

    * SDI ("Standard Drive Interconnect", minicomputer interface standard by DEC, interface: 4x coaxial cable, UDA50 (UNIBUS) and KDA50 (Q-Bus) and KDB50 (VAXBI) and KDM70 (XMI) MSCP controllers (the "power pigs"), RAxx disks with two controller ports (A/B))

    * ST506 interface (microcomputer MFM/RLL disk drive interface (ST506/412 are names of disk drives implementing this de-facto standard), DEC RQDX1/RQDX2/RQDX3 (Q-Bus) MSCP controllers, Emulex DM01/QD01 (Q-Bus) MSCP controller, e.g. DEC RDxx disks and RX50 floppy drives, how to modify a PC-MFM disk for RQDX)

    * ESDI ("Enhanced Small Device Interface", microcomputer interface standard (successor of ST506 interface), e.g. Emulex DM02/QD21/QD24 (Q-Bus) and UD23 (UNIBUS) MSCP controllers)

    * RL01/RL02 interface (proprietary interface for removable disk drives RL01/RL02, RL11 (UNIBUS) and RLV11/RLV12 (Q-Bus) controllers, no MSCP)

    * SCSI ("Small Computer System Interface", micro+minicomputer interface standard (successor of SASI "Shugart Associates Standard Interface"), e.g. single-chip SCSI non-MSCP controllers in VAXstations (see note for "class driver"), e.g. Emulex UC04/UC07/UC08 (Q-Bus) and UC13/UC17 (UNIBUS) MSCP controllers)

    * IPI ("Intelligent Peripheral Device", minicomputer interface standard (ANSI/ISO 9318-3), not used for VAX???)

    * ATA/IDE ("AT Attachment", PC(AT) 16-Bit DMA interface standard, not used for VAX???)

    peripheral chips:

    * SMC HDC9224 (ST506 interface controller, used on RQDX3 and KA410)
    * AMD LANCE (Ethernet controller)
    * DEC SGEC ("Second Generation Ethernet Controller", Ethernet controller, connected to CDAL mainbus, successor of LANCE)
    * NCR 83C11 (SCSI controller)
    * NCR 5380 (SCSI controller)
    * NCR 53C94 (SCSI controller)
    * DEC SII (acts either as SCSI or DSSI controller, port driver is called "MSI" ("Mayfair Storage Interconnect") after the first machine ("Mayfair") where SII was used)
    * DEC SHAC ("Single Host Adapter Chip", DSSI controller, connected to CDAL mainbus, GVP implemented)

    graphics systems:

    * QVSS ("Q-Bus Video Sub-System", VCB01, Q22-Bus module, 1024x864 monochrome, GCADRIVER, used in VAXstation II)
    * QDSS ("Q-Bus Display Sub-System", also "GPX", VCB02, Q22-Bus module, 1024x864 4/8-plane color, GAADRIVER, used in VAXstation II/GPX, VAXstation 3200, VAXstation 3500)
    * LEGSS ("Low End Graphics Sub-System", VCB03, M-Bus module, 1280x1024 8/24-plane color, GBBDRIVER, used in VAXstation 3520, VAXstation 3540, modules: L2004 (base), L2005 (8-plane output), L2006 (16-plane upgrade))
    * ??? (???, 1024x864 (8200x6900 interpolated) color, 3D vector acclerator, Shadowfax technique (esp. anti-aliasing), by Evans & Sutherland, used in VAXstation 8000 (based on VAX 8250), info 1988)
    * ??? ("on-board", 1024x864 monochrome, GCBDRIVER, used in VAXstation 2000, VAXstation 3100)
    * GPX (VS40X, "Graphics Processor Extension", "busless", 1024x864 8-plane color, GABDRIVER, used in VAXstation 2000/GPX, VAXstation 3100/GPX)
    * SPX
    (WS01X, "busless", 1280x1024 8-plane color, used in VAXstation 3100/SPX)
    * ??? (PV21X, used in VAXstation 4000/60)
    * ??? (PV71X, used in VAXstation 4000/90)
    Note: VMS INDRIVER is the common DECwindows driver (server interface)

    operating systems:

    VAX/VMS (later "OpenVMS VAX", former versions for MicroVAX processors: "MicroVMS", command language interpreter: DCL)
    (standalone system, similar to Micropower Pascal for PDP-11)
    ULTRIX ("ULTRIX-32", former versions for MicroVAX processors: "ULTRIX-32m", later "ULTRIX VAX")
    UNIX (32/V)
    BSD (3BSD, 4BSD, NetBSD/vax)
  Workstations/Servers: performance overview, SPEC table (DiMarco)
  • VAXstation (see VAX)

  • MIPS (models, NetBSD/mipsco)
    MIPS chips see here

    M series (models, naming: number reflects performance in MIPS)
    M/500 (R2000 at 8.3 MHz, R2010 FPU or R2360 FPU board with W1164, server, M/500 report)
    M/800 (R2000 + R2010 at 12.5 MHz, server)
    M/1000 (R2000 + R2010 at 15 MHz, server)
    M/120-3, -5 (R2000A + R2010A at 12.5/16.67 MHz, deskside, 1988)
    M/12 = RC2030
    M/2000 (R3000 + R3010 at 25 MHz, server, 1989)
    M/20 = RS3230

    RS, RC series (models, naming: Rabcde: a=S/C for workstation/server, b=2/3/4/5 for R2000/3000/4000/6000 processor family, de=30/40/60/80 for desktop/deskside/low height server/rackmount server)
    RC2030 ("M/12", R2000A + R2010A at 16.67 MHz, 1989, desktop)
    RC3240 (M/120 with R3000 + R3010 at 20 MHz, 1989)
    RC3230 ("Magnum 3000" or "M/20", R3000 + R3010 at 25 MHz, desktop)

  • DECstation/system (history, models, models2, Linux, documentation, NetBSD/pmax, DEC documents)
    Note: based on MIPS 32-Bit RISC CPUs, has nothing to do with the DEC minicomputers DECsystem (36-Bit) and DECstation (12-Bit)
    MIPS chips see here

    DECstation (graphics workstation):
    3100, 2100 ("PMAX"/"PMIN", R2000A + R2010A + 4xR2020 at 16.67/12.5 MHz, kn01),
    5000/200 ("3MAX", R3000A + R3010A at 25 MHz, kn02, TURBOchannel 25 MHz),
    5000/120, 5000/125 ("3MIN", R3000A + R3010A at 20/25 MHz, kn02ba, TURBOchannel 12.5 MHz),
    5000/133 (5000/120 with R3000A + R3010A or R3400 at 33 MHz),
    5000/240 ("3MAX+", like 5000/200 with R3000A + R3010A or R3400 at 40 MHz, kn03),
    5000/150 (5000/120 with R4000 at 50(100) MHz, kn04),
    5000/260, 5000/280 (5000/240 with R4400 at 60 MHz, kn05)

    Personal DECstation
    (low cost graphics workstation):
    5000/20, 5000/25 ("MAXine", R3000A + R3010A at 20/25 MHz, kn02ca, TURBOchannel 12.5 MHz),
    5000/33 (5000/20 with R3000A + R3010A or R3400 at 33 MHz, kn02ca or kn02da),
    5000/50 (5000/20 with R4000 at 50(100) MHz, kn04)

    3100, 2100 (server versions of DECstations, no graphics),
    5000/25, 5000/50, 5000/150, 5000/200, 5000/240, 5000/260 (server versions of DECstations, no graphics),
    5100 ("MIPSMATE", R3000A + R3010A at 20 MHz, kn230),
    5400 ("MIPSfair", R3000A + R3010A at 20 MHz, kn210),
    5810, 5820, 5830, 5840 ("ISIS", multiprocessor R3000A + R3010A at 25 MHz, kn5800),
    5500 ("MIPSFAIR-2", R3000A + R3010A at 33 MHz, kn220),
    5900/40, 5900/60 (rackmount version of 5000/240 and 5000/260)

  • DEC/AlphaStation/Server: NetBSD/alpha, DEC documents, Compaq

    DEC series (EV4, EV45): models

    AlphaStation series (EV4, EV45, EV5): models

    AlphaServer series (EV4, EV45, EV5, EV56, EV6): models

    Compaq AlphaStation/AlphaServer series (EV6, EV67): models

  • HP HP9000 (HP manuals, 4.3BSD for HP9000):

    series 200
    220, 226, 236 (68000 at 8 MHz, 1982, upgradable to 68010 at 12.5 MHz),
    217, 237 (68000/68010, 1984, graphics workstation)

    series 300/400
    (680x0, NetBSD/hp300, models 300/400):
    310 (68010 + MMU at 10 MHz, DIO-I),
    318, 319 (68020 + 68881 + 68851 at 16.67 MHz, onboard devices),
    320 (68020 + 68881 +68851 at 16.67 MHz, DIO-I),
    330 (320 with DIO-II),
    350 (330 at 25 MHz),
    332 (68030 at 16.67 MHz),
    340 (319 with 68030 + 68882 at 16.67 MHz),
    360 (330 with 68030 + 68882 at 25 MHz),
    362 (332 with faster CPU),
    370 (350 with 68030 + 68882 at 33 MHz),
    345, 375 (68030 + 68882 at 50 MHz, upgradable to 68040, DIO-II)
    380, 382, 385 (375 with 68040 at 25 MHz),
    400 (68030 + 68882 at 50 MHz, EISA),
    400t (400 with 68040 at 25 MHz),
    425[te], 433[te] (68040 at 25/33 MHz, t=tower/e=desktop, ISA)

    series 600/800/900
    (PA-RISC 1.0/1.1, NetBSD/hp700, 4.4BSD-Lite for PA-RISC, Linux for PA-RISC, hardware database):
    825, 835, 845, 935, 635 (PA 1.0 PA7000 PCX),
    807, 817, 827, 837, 847, 857, 867, 877, 957, 957LX (PA 1.1a PA7000 PCX-S),
    887, 897, 987 (
    PA 1.1b PA7100/7150 PCX-T)

    series 700
    (PA-RISC 1.1, NetBSD/hp700, 4.4BSD-Lite for PA-RISC, Linux for PA-RISC, hardware database):
    705, 710, 720, 730, 750 (PA 1.1a PA7000 PCX-S),
    715(/33,/50,/75), 725(/50,/75), 735(/99), 755(/99) (PA 1.1b PA7100 PCX-T),
    712(/60,/80), 715(/64,/80,/100), 725(/100) (PA 1.1c PA7100 PCX-L),
    735(/125), 755(/125) (PA 1.1b PA7150 PCX-T)

    series C,J class
    (PA-RISC 1.1/2.0, NetBSD/hp700, 4.4BSD-Lite for PA-RISC, Linux for PA-RISC, hardware database):
    C100, C110, J100, J110, J200, J210 (PA 1.1d PA7200 PCX-T')

  • Apollo (info, models, University of Michigan Apollo archive)
    DN10000 (based on Apollo PRISM RISC processor)

  • Silicon Graphics (SGI)

    IRIS 4D (MIPS CPU, GTX graphics system, GL graphics library)
    O2 (info, info2)

    workstations tech infos

  • Sun (models+pinouts+boards, history+models, ROM monitors, boards, boards2, cardcage, admin)

    680x0 based
    (NetBSD/sun3) Sun-1/Sun-2/Sun-3:

    Sun-1 (with Stanford video board):
    100 (based on SUN "Stanford University Network" architecture, 68000 at 10MHz), 100u (Sun-2 CPU upgrade)
    170 (rackmount server)

    120 (68010 at 10 MHz, Multibus, SCSI)
    170 (68010 at 10 MHz, Multibus)
    50 (68010 at 10 MHz, 2 slot VME, SCSI "SCSI-2" board)
    160 (68010 at 10 MHz, 12 slot VME)

    Sun-3 (archive)
    160 (68020, VME)
    75 (2 slot desktop)
    140 (3 slot)
    150 (6 slot)
    180 (12 slot rackmount)
    110 ("Prism", optional 8-Bit color graphics, 3 slot)
    50 ("Model25", 68020 at 15.7 MHz, monochrome)
    60 ("Ferrari", 68020 at 20 MHz, mono and color (1600x1100 or 1152x870), optional GX frame buffer), 60LE
    260, 280 (68020 at 25 MHz)
    80 ("Hydra", 68030 at 20 MHz + 68882 at 20/40 MHz, package similar to SPARCstation 1, P4 video bus)
    470, 480 ("Pegasus", 68030 + 68882 at 33 MHz)

    SPARC based
    (NetBSD/sparc, OpenBSD/sparc), Sun-4/SPARCxxx:

    sun4 MMU
    Sun-4/260 ("Sunrise", first SPARC, SF9010 at 16.67 MHz), 280,
    Sun-4/110 ("Cobra", MB86900 at 14.28MHz, P4 frame buffer), 150,
    Sun-4/330 (SPARCstation 330, SPARCserver 330, "Stingray", CY7C601 + TI8847 at 25MHz), 350, 360, 370, 390

    sun4 3-level MMU:
    Sun-4/470, 490 ("Sunray", CY7C601 at 33 MHz)

    sun4c MMU:
    SPARCstation 1 (4/60, "Campus" or "Campus-1", MB86901A + 3170 at 20 MHz, "pizza-box" package),
    SPARCstation 1+ (4/65, "Campus B", L64801 + 3170 at 25 MHz, "pizza-box" package),
    Sun-4E (SPARCengine 1E, SPARCstation 1 with VME),
    SPARCstation/SLC (4/20, "Off-Campus", MB86901A at 20 MHz, in monitor),
    SPARCstation/IPC (4/40, "Phoenix", MB86902 at 25 MHz, "lunch-box" package),
    SPARCstation 2 (4/75, "Calvin", CY7C601 + TMS390C601A at 40 MHz, "pizza-box" package)
    SPARCstation/ELC (4/25, "Node Warrior", MB86903 at 33 MHz, in monitor)
    SPARCstation/IPX (4/50, "Hobbes", MB86903 at 40 MHz, GX color frame buffer, "lunch-box" package),

    sun4m MMU
    SPARCserver 6xxMP/xx ("Galaxy", CY7C601 + 602 + 605 at 40 MHz, multiprocessor),
    SPARCclassic (SPARCstation LC, "Sunergy", 4/15, microSPARC at 50 MHz),
    SPARC LX (4/30, microSPARC at 50 MHz),
    SPARCstation Voyager (microSPARC II at 60 MHz),
    SPARCstation 5 (microSPARC II at 70/85 MHz), SPARCstation 4,
    SPARCstation 10 ("Campus-2", SuperSPARC at 33-50 MHz),
    SPARCstation 20/xxx (SuperSPARC at 50/60 MHz, multiprocessor)

    sun4d MMU
    SPARC Server 1000 (SuperSPARC at 50/60 MHz),
    SPARC Center 2000 ("Dragon", SuperSPARC at 40-50 MHz)

    UltraSPARC based


  • Fairlight QASAR
    (dual-CPU computer with interleaved bus usage, graphics card with lightpen interface, used as control computer in the Fairlight Computer Musical Instrument, various "co-processor" boards for real-time I/O and sound generation)
    please see Fairlight CMI page for more details

    QASAR (2x6800 @1MHz, 64KB, Fairlight QDOS, 1975)
    QASAR 6809 (2x6809 @1MHz, virtual memory, max. 2MB, Fairlight QDOS or OS9 Level 2, 1983)

    QASAR 6809 virtual memory summary:
    page size: 2KB (4KB optional)
    virtual address space: 64KB (32 pages)
    physical address space: 2MB (1024 pages)
    hardware maps ("tasks"): 32
    states: 12
    (compare with Tandy CoCo3)
  Home/Personal Computers:
  • Tandy (RadioShack) TRS-80
    (Tandy Home-Computers, models + history, www.trs-80.com, models, infos, infos, cocoshop):

    Model 1 (Z80 @1.77MHz, 4-48KB, 1977, info, info)
    Model II (Z80A @4MHz, 32-48KB, 1979, business computer, info, info)
    Model 3 (Z80A @2.03MHz, 16-48KB, 1980, info, info)
    Model 4 (Z80A @4MHz, 128KB, 1983, info)
    Model 4-P (portable Model 4)
    Model 12 (improved Model II, Z80, business computer, info)
    Model 16 (Z80 + 68000, business computer, info)
    Model 100 (laptop, 80C85 @2.4MHz, 8-32KB, 1983, info)
    Model 102 (laptop)
    Model 200 (laptop, 80C85 @2.4MHz, 24-72KB, 1985, info)
    Model 600 (laptop, info)
    Model 1000 (8088 @4.77MHz, 256-640KB, files)
    Model 2000
    Model 6000 (improved Model 16, Z80 + 68000, business computer, info)
    MC-10 (6803, 4-16KB, info, 1982)
    Color Computer ("CoCo", 6809 @0.894MHz, 4-64KB, 1980, info)
    Color Computer 2 ("CoCo2", 6809 @0.894MHz, 16-64KB, OS9 Level 1, 1983, info)
    Color Computer 3 ("CoCo3", 68B09 @2MHz, virtual memory, 128-512KB, OS9 Level 2, 1986, info)


    Coco3 virtual memory summary:
    page size: 8KB
    virtual address space: 64KB (8 pages)
    physical address space: 512KB (64 pages)
    hardware maps ("tasks"): 2

    (compare with Fairlight QASAR 6809)

  • Apple
    Apple II (6502 based)

  • Commodore
    (6502 based, "SID" 6581 soundchip)

  • Atari
    Atari Historical Society (technical documents)

    Atari ST

  • DEC

    12-Bit (PDP-8 based):

    DECmate I ("VT278", 1980, HM6120 microprocessor, OS/278 (special OS/8), info, picture)
    DECmate II (1982, 32KW RAM, info, picture)
    DECmate III (1984)
    DECmate III+ (1985)

    16-Bit (PDP-11 based):

    PRO-325, 350 (F11 (PDP-11), also used as "VAX Console", P/OS (menu based version of RSX-11M) or RT-11 or VENIX (by VenturCom), 325: RX50 dual floppy, 350: additional RD50/52/54 harddisks, 1982, info, info2)
    PRO-380 (J11 (PDP-11) at 10 MHz, central system clock 20 MHz (which was too high for 18 MHz J11 CPU, original design was planned for a 20 MHz J11 that was never produced, therefore 10 MHz was chosen), upgraded PRO-350, 1986)

    8-Bit (Intel 8080 based):

    VK100 ("Gigi", 8085 computer/terminal, Basic, info)

    8-Bit (Zilog Z80 based):

    VT180 ("Robin", VT100 with built-in Zilog Z80 computer, CP/M, info)

    16-Bit (Intel x86 based):

    Rainbow 100 series (Intel 8088 at 4.81 MHz + Zilog Z80A at 4 MHz, 128-896 KB RAM, 2x396 KB floppies, MS DOS + CP/M, 1982, info)

    VAXmate (Intel 80286 at 8MHz, 2 MB RAM, 1.2 floppy, LANCE ethernet, diskless networked PC, 1986, Computerwoche 1986)
    VAX as network server running PCSA (later called PATHWORKS) on VMS, ("NETBIOS via DECnet", Ethernet type=0x8040)

  • IBM

    PC (based on Intel x86 CPUs, IBM vintage PCs: info + downloads, PC history)

    PC ("5150", 8088 at 4.77 MHz, 256 KB RAM, 160 KB floppy, 1981, info)

    PC/XT Model 089 ("5160", "Extended Technology", same as 5150 but with 360 KB floppy and harddisk, 1983, info)

    PCjr Model 4, Model 67 ("4860", 8088 at 4.77 MHz, 128 KB RAM, 360 KB floppy, 1983, info)

    PC/AT Model 339 ("5170", "Advanced Technology", 286 at 6/8 MHz, 512 KB RAM, 1.2 MB floppy + harddisk, 1984, info)

    Portable PC Model 68 ("5155", 8088 at 4.77 MHz, 256/640 KB RAM, 1984, info)

    PC Convertible ("5140", 80C88 at 4.77 MHz, 256/512 KB RAM, 1986, info)

    PC/XT Model 286 ("5162", PC AT in PC XT box, 640 KB RAM, 1986, info)

    PS/2 (based on Intel x86 CPUs, IBM vintage PCs, models, MicroChannel (MCA) models)

    8530 Model 30/30 286 (8086 at 8 MHz/286 at 10 MHz, ISA, 1987/1988, info, info 286),
    8550 Model 50/50 Z (286 at 10 MHz, 16-Bit MCA, 1987/1988, info, info Z),
    8560 Model 60 (286 at 10 MHz, 16-Bit MCA, tower, 1987, info),
    8580 Model 80 (386DX at 16(0x1)/20(1xx)/25(Axx) MHz, 32-Bit MCA, tower, 1987, info),

    8525 Model 25/25 286/25 SX (8086 at 8 MHz/286 at 10 MHz/386SX at 16 MHz, ISA, 1987/1990/?, info, info 286),

    8570 Model 70/70 486 (386DX at 16(E21)/20(1xx)/25(Axx) MHz/486DX at 25 MHz, 32-Bit MCA, 1988/1990, info, info 486),

    8555 Model 55 SX (386SX at 16 MHz, 16-Bit MCA, upgraded Model 30 with MCA, 1989, info),

    8565 Model 65 SX (386SX at 16 MHz, 16-Bit MCA, tower, upgraded Model 60, 1990, info),

    8590 Model 90 XP 486 (486SX/486DX at 25/33 MHz, 32-Bit MCA, SCSI, 1990, info),
    8595 Model 95 XP 486 (486SX at 20/25 MHz, 486DX at 25/33/50 MHz, 486DX2 at 25(50) MHz, 32-Bit MCA, server, tower, 1990, info),

    8535 Model 35 SX/35 SLC (386SX/386SLC at 20 MHz, ISA, 1991/1992, info, info SLC),
    8540 Model 40 SX/40 SLC (386SX/386SLC at 20 MHz, ISA, 1991/1992, info, info SLC),
    8557 Model 57/57 SLC (386SX at 20 MHz/386SLC at 20(40) MHz, 16-Bit MCA, SCSI, 1991/1992, info, info SLC),
    8556 Model 56 SX/56 SLC (386SX at 20 MHz/386SLC at 20(40) MHz, 16-Bit MCA, 1991/1992, info, info SLC),

    9556 Model 56 486SLC2 (486SLC2 at 25(50) MHz, 16-Bit MCA, 1992, info),
    9557 Model 57 486SLC2 (486SLC2 at 25(50) MHz, 16-Bit MCA, 1992, info),
    9576 Model 76 (486SX at 33 MHz, 32-Bit MCA, 1992, info),
    9576 Model 76i/76s (486SX at 33 MHz, 486DX2 at 33(66) MHz, 486DX4 25(100), 32-Bit MCA),
    9577 Model 77/77i/77s (9576 with more MCA slots, 1992, info),
    9585 Model 85 (486SX at 33 MHz, 32-Bit MCA, server, tower, 1992, info),
    9595 Model 95 XP 486/Server 95 466/Server 95 560/Server 95 566/Server 95A (486DX at 50 MHz/486DX2 25(50) MHz/486DX2 33(66) MHz/Pentium60/Pentium66, ECC, 32-Bit MCA, server, tower, 1992, info)

    Enhanced PS/2 9590 Model 90 XP 486 (486DX2 at 25(50) MHz, 32-Bit MCA, 1993, info),

    PC/RT (based on ROMP 032 RISC CPU, info, operating systems: AIX and AOS, 1986)
    6150 (tower version),
    6151 (desktop version),
    6152 (PS/2 Model 60 with ROMP CPU MCA card)
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Designed by K.M. Indlekofer. See disclaimer. Send comments about this site to Klaus Michael Indlekofer. Last updated 11/11/2002.